/*
 * Copyright (C) 2018-2019 Atmark Techno, Inc. All Rights Reserved.
 *
 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
 */

#include <dt-bindings/pwm/pwm.h>

&iomuxc {
	pinctrl_expansion_interfacehog: expansion_interfacehoggrp {
		fsl,pins = <
			/* CON9 */
			MX6UL_PAD_UART2_CTS_B__GPIO1_IO22	0x400010b0 // CON9_1
			MX6UL_PAD_UART2_RTS_B__GPIO1_IO23	0x400010b0 // CON9_2
			MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31	0x400010b0 // CON9_4
			MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30	0x400010b0 // CON9_6
									   // CON9_7   VCC_3.3V
									   // CON9_8   VCC_3.3V
									   // CON9_9   GND
									   // CON9_10  GND
									   // CON9_11  ONOFF
									   // CON9_12  PWRON
			MX6UL_PAD_LCD_DATA20__GPIO3_IO25	0x400010b0 // CON9_15
			MX6UL_PAD_LCD_DATA22__GPIO3_IO27	0x400010b0 // CON9_17
									   // CON9_19  GND
									   // CON9_20  VCC_3.3V
									   // CON9_21  USB2_DN
									   // CON9_22  USB2_DP
									   // CON9_23  USB2_VBUS
									   // CON9_24  USB2_EN
			MX6UL_PAD_NAND_DATA04__GPIO4_IO06	0x400010b0 // CON9_25
			MX6UL_PAD_NAND_DATA05__GPIO4_IO07	0x400010b0 // CON9_26
			MX6UL_PAD_NAND_DATA06__GPIO4_IO08	0x400010b0 // CON9_27
			MX6UL_PAD_NAND_DATA07__GPIO4_IO09	0x400010b0 // CON9_28

			/* CON8 */
									   // CON8_1   GND
									   // CON8_2   GND

			/* CON14 */
									   // CON14_1  VCC_3.3V
									   // CON14_2  GND
			MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20	0x400010b0 // CON14_3
			MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21	0x400010b0 // CON14_4

			/* CON11 */
									   // CON11_1  VCC_5V
									   // CON11_2  VCC_5V
									   // CON11_3  VCC_5V
									   // CON11_4  VCC_3.3V
									   // CON11_5  VCC_3.3V
									   // CON11_6  GND
									   // CON11_7  GND
			MX6UL_PAD_NAND_DQS__GPIO4_IO16		0x400010b0 // CON11_12
									   // CON11_19 GND
									   // CON11_26 GND
									   // CON11_33 GND
			MX6UL_PAD_GPIO1_IO04__GPIO1_IO04	0x400010b0 // CON11_34
			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x400010b0 // CON11_35
			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0x400010b0 // CON11_36
			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0x400010b0 // CON11_37
									   // CON11_38 GND
			MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18	0x400010b0 // CON11_39
			MX6UL_PAD_CSI_DATA01__GPIO4_IO22	0x400010b0 // CON11_42
			MX6UL_PAD_CSI_DATA02__GPIO4_IO23	0x400010b0 // CON11_43
			MX6UL_PAD_CSI_DATA07__GPIO4_IO28	0x400010b0 // CON11_44
			MX6UL_PAD_CSI_DATA06__GPIO4_IO27	0x400010b0 // CON11_45
			MX6UL_PAD_CSI_DATA05__GPIO4_IO26	0x400010b0 // CON11_46
			MX6UL_PAD_CSI_DATA04__GPIO4_IO25	0x400010b0 // CON11_47
			MX6UL_PAD_CSI_HSYNC__GPIO4_IO20		0x400010b0 // CON11_48
									   // CON11_50 GND
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1 // CON9_3
			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x00008 // CON9_5

		>;
	};

	pinctrl_pwm7: pwm7grp {
		fsl,pins = <
			MX6UL_PAD_CSI_VSYNC__PWM7_OUT		0x110b0 // CON11_49
		>;
	};

	pinctrl_lcdif: lcdifgrp {
		fsl,pins = <
			MX6UL_PAD_LCD_CLK__LCDIF_CLK		0x08	// CON11_8
			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC	0x08	// CON11_9
			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC	0x08	// CON11_10
			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE	0x08	// CON11_11

			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00	0x08	// CON11_13
			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01	0x08	// CON11_14
			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02	0x08	// CON11_15
			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03	0x08	// CON11_16
			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04	0x08	// CON11_17
			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05	0x08	// CON11_18
			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06	0x08	// CON11_20
			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07	0x08	// CON11_21
			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08	0x08	// CON11_22
			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09	0x08	// CON11_23
			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10	0x08	// CON11_24
			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11	0x08	// CON11_25
			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12	0x08	// CON11_27
			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13	0x08	// CON11_28
			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14	0x08	// CON11_29
			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15	0x08	// CON11_30
			MX6UL_PAD_LCD_DATA16__LCDIF_DATA16	0x08	// CON11_31
			MX6UL_PAD_LCD_DATA17__LCDIF_DATA17	0x08	// CON11_32
		>;
	};

	pinctrl_i2c_gpio1: i2cgpio1grp {
		fsl,pins = <
			MX6UL_PAD_CSI_DATA03__GPIO4_IO24	0x4001b8b1	// CON11_41
			MX6UL_PAD_CSI_DATA00__GPIO4_IO21	0x4001b8b1	// CON11_40
		>;
	};

	pinctrl_i2c_gpio2: i2cgpio2grp {
		fsl,pins = <
			MX6UL_PAD_LCD_DATA18__GPIO3_IO23	0x00008		// CON9_13
			MX6UL_PAD_LCD_DATA19__GPIO3_IO24	0x00008		// CON9_14
		>;
	};

	pinctrl_rtc_nr3225sa: rtcnr3225sagrp {
		fsl,pins = <
			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x08000		// CON9_16
			>;
	};

	pinctrl_usb2_port_en: usb2portengrp {
		fsl,pins = <
			MX6UL_PAD_LCD_DATA23__GPIO3_IO28	0x40000008	// CON9_18
		>;
	};

};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&pwm7 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm7>;
	status = "okay";
};

&lcdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lcdif>;
	display = <&display0>;
	lcd-supply = <&extreg_3v3>;
	status = "okay";
	display0: display0 {
		bits-per-pixel = <32>;
		bus-width = <18>;
		display-timings {
			timing0: timing0 {
				clock-frequency = <29232000>;
				hactive = <800>;
				vactive = <480>;
				hback-porch = <40>;
				hfront-porch = <40>;
				vback-porch = <29>;
				vfront-porch = <13>;
				hsync-len = <48>;
				vsync-len = <3>;
				de-active = <1>;
				pixelclk-active = <0>;
				hsync-active = <0>;
				vsync-active = <0>;
			};
		};
	};
};

&gpio3 {
	usb2_port_en {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usb2_port_en>;

		gpio-hog;
		gpios = <28 GPIO_ACTIVE_HIGH>;
		line-name = "USB2_PORT_EN";
		output-low;
	};
};

/ {
        extreg_3v3: ext-regulator-3v3 {
                compatible = "regulator-fixed";
                regulator-name = "3V3";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                regulator-always-on;
        };

	extreg_5v: ext-regulator-5v {
		compatible = "regulator-fixed";
		regulator-name = "5V";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
	};

	chosen {
		stdout-path = &uart1;
	};

	aliases {
		rtc0 = &rtc_nr3225sa;
	};

	i2c-gpio1 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio1>;

		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "i2c-gpio";
		gpios = <
			&gpio4 21 GPIO_ACTIVE_HIGH /* SDA */
			&gpio4 24 GPIO_ACTIVE_HIGH /* SCL */
		>;
		i2c-gpio,delay-us = <2>;

		touchpanel@51 {
			compatible = "hid-over-i2c";
			interrupt-parent = <&gpio4>;
			interrupts = <18 IRQ_TYPE_NONE>;
			reg = <0x51>;
			hid-descr-addr = <0x0001>;
			vdd-supply = <&extreg_5v>;
			reset-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
		};
	};

	i2c-gpio2 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_gpio2>;

		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "i2c-gpio";
		gpios = <
			&gpio3 24 GPIO_ACTIVE_HIGH /* SDA */
			&gpio3 23 GPIO_ACTIVE_HIGH /* SCL */
		>;
		i2c-gpio,delay-us = <2>;

		rtc_nr3225sa: rtc-nr3225sa {
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_rtc_nr3225sa>;

			compatible = "ndk,nr3225sa";
			reg = <0x32>;

			interrupt-parent = <&gpio3>;
			interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
		};
	};

	ext_backlight_display: ext-backlight-display {
		compatible = "pwm-backlight";
		pwms = <&pwm7 0 5000000>;
		brightness-levels = <0 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>;
		default-brightness-level = <128>;
		status = "okay";
	};

};